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Automatic Number Plate Recognition on FPGA

Zhai, Xiaojun and Bensaali, Faycal and McDonald-Maier, Klaus (2013) Automatic Number Plate Recognition on FPGA. In: 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS), 2013-12-08 - 2013-12-11, Abu Dhabi, United Arab Emirates.

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Abstract

Automatic Number Plate Recognition (ANPR) systems have become one of the most important components in the current Intelligent Transportation Systems (ITS). In this paper, a FPGA implementation of a complete ANPR system which consists of Number Plate Localisation (NPL), Character Segmentation (CS), and Optical Character Recognition (OCR) is presented. The Mentor Graphics RC240 FPGA development board was used for the implementation, where only 80% of the available on-chip slices of a Virtex-4 LX60 FPGA have been used. The whole system runs with a maximum frequency of 57.6 MHz and is capable of processing one image in 11ms with a successful recognition rate of 93%.

Item Type: Conference or Workshop Item (Paper)
Additional Information: Published proceedings: 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)
Divisions: Faculty of Science and Health > Computer Science and Electronic Engineering, School of
Depositing User: Elements
Date Deposited: 04 Jun 2020 08:14
Last Modified: 04 Jun 2020 09:15
URI: http://repository.essex.ac.uk/id/eprint/27770

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