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Wang, Xiaohang and Huang, Hengli and Chen, Ruolin and Jiang, Yingtao and Singh, Amit Kumar and Yang, Mei and Huang, Letian (2023) Detection of Thermal Covert Channel Attacks Based on Classification of Components of the Thermal Signal Features. IEEE Transactions on Computers, 72 (4). pp. 971-983. DOI https://doi.org/10.1109/tc.2022.3189578
Wang, Shengjie and Wang, Xiaohang and Jiang, Yingtao and Singh, Amit Kumar and Yang, Mei and Huang, Letian (2023) Modeling and Analysis of Thermal Covert Channel Attacks in Many-core Systems. IEEE Transactions on Computers, 72 (2). pp. 494-500. DOI https://doi.org/10.1109/tc.2022.3160356
Wen, Shengyan and Wang, Xiaohang and Singh, Amit and Jiang, Yingtao and Yang, Mei (2022) Performance Optimization of Many-core Systems by Exploiting Task Migration and Dark Core Allocation. IEEE Transactions on Computers, 71 (1). pp. 92-106. DOI https://doi.org/10.1109/tc.2020.3042663
Xiao, Siyuan and Wang, Xiaohang and Palesi, Maurizio and Singh, Amit Kumar and Wang, Liang and Mak, Terrence (2021) On Performance Optimization and Quality Control for Approximate-Communication-Enabled Networks-on-Chip. IEEE Transactions on Computers, 70 (11). pp. 1817-1830. DOI https://doi.org/10.1109/tc.2020.3027182
Rathore, Vijeta and Chaturvedi, Vivek and Singh, Amit K and Srikanthan, Thambipillai and Shafique, Muhammad (2021) Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors. IEEE Transactions on Computers, 70 (7). pp. 1106-1119. DOI https://doi.org/10.1109/tc.2020.3006571
Wang, Xiaohang and Singh, Amit Kumar and Li, Bing and Yang, Yang and Li, Hong and Mak, Terrence (2018) Bubble budgeting: throughput optimization for dynamic workloads by exploiting dark cores in many core systems. IEEE Transactions on Computers, 67 (2). pp. 178-192. DOI https://doi.org/10.1109/TC.2017.2735967
Wood, Steve K and Akehurst, David H and Uzenkov, Oleg and Howells, WGJ and McDonald-Maier, Klaus D (2008) A Model-Driven Development Approach to Mapping UML State Diagrams to Synthesizable VHDL. IEEE Transactions on Computers, 57 (10). pp. 1357-1371. DOI https://doi.org/10.1109/tc.2008.123