Pal, Chandrajit and Verma, Pratibha and Rohit, Himanshu and Gyaneshwar, Dubacharla and Channappayya, Sumohana S and Acharyya, Amit (2023) SqueezeNetVLAD: High-speed power and memory efficient GPS less accurate network model for visual place recognition on the edge. In: 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS), 2023-06-26 - 2023-06-28, Edinburgh, United Kingdom.
Pal, Chandrajit and Verma, Pratibha and Rohit, Himanshu and Gyaneshwar, Dubacharla and Channappayya, Sumohana S and Acharyya, Amit (2023) SqueezeNetVLAD: High-speed power and memory efficient GPS less accurate network model for visual place recognition on the edge. In: 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS), 2023-06-26 - 2023-06-28, Edinburgh, United Kingdom.
Pal, Chandrajit and Verma, Pratibha and Rohit, Himanshu and Gyaneshwar, Dubacharla and Channappayya, Sumohana S and Acharyya, Amit (2023) SqueezeNetVLAD: High-speed power and memory efficient GPS less accurate network model for visual place recognition on the edge. In: 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS), 2023-06-26 - 2023-06-28, Edinburgh, United Kingdom.
Abstract
Visual place recognition (VPR) provides the ability for a machine to recognise any given place if it has been visited before by utilising visual graphics data. Classical handcrafted feature extraction doesn’t seem to perform well under varying environmental conditions, which is where the convolutional neural networks with their state-of-the-art performance act as a substitute however at the cost of an increased computational complexity making it difficult to port into resource-constrained edge devices like tiny robots, drones etc. This motivated us to propose an optimal NetVLAD network algorithm consisting of an optimised and efficient feature extraction base network performing feature extraction while satisfying both a given constraint of accuracy and the resource budget of a target implementation platform. Both the accuracy, which is marginally better, the achieved model size reduction is better by 17% and a nominal power reduction by 5% w.r.t the SOTA models. Also developed a customised CUDA kernel that dynamically compares the pair of query image feature vectors to the descriptor vectors of the already stored gallery image datasets in parallel utilising the maximum available tensor cores achieving hard-real time performance at 62.5 fps with input videos tested on the Nvidia Jetson Xavier NX platform.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Uncontrolled Keywords: | Performance evaluation , Visualization , Tensors , Graphics processing units , Benchmark testing , Feature extraction , Kernel |
| Divisions: | Faculty of Science and Health Faculty of Science and Health > Computer Science and Electronic Engineering, School of |
| SWORD Depositor: | Unnamed user with email elements@essex.ac.uk |
| Depositing User: | Unnamed user with email elements@essex.ac.uk |
| Date Deposited: | 07 Aug 2026 11:05 |
| Last Modified: | 07 Aug 2026 11:05 |
| URI: | http://repository.essex.ac.uk/id/eprint/38241 |
Available files
Filename: SqueezeNetVLAD High-speed power and memory efficient GPS less accurate network model for visual place recognition on the edge.pdf