Reconfigurable Fault-tolerance Mapping Method for Real-Time and Dependent Tasks on Flexible Adapt-NoC MPSoCs

Multi-Processor Systems-on-Chip (MPSoCs) utilizing Network-on-Chip (NoC) architectures are widely adopted in domains such as autonomous driving, wearable devices, and the Internet of Things (IoT) due to their strengths in energy efficiency, reliability, and communication performance. However, NoCs are inherently susceptible to permanent faults in cores, links, and routers, which compromise system performance, energy consumption, and reliability. Most existing fault-tolerant approaches address only specific fault scenarios and often neglect broader impacts on system-level metrics, such as communication efficiency, energy consumption, and load distribution. In this work, we address the fault-tolerant task mapping problem under multiple permanent faults across different components. Using Adapt NoC as the target platform, we develop a permanent fault model that supports topology reconfiguration and formulate a mapping problem to minimize energy consumption and communication overhead while ensuring load balance. To solve this, we introduce the Fault-Tolerant Topology Generation and Task Mapping (FTTGTM) method, which comprises a topology generation strategy based on an enhanced Feasibility-Pump approach, a dynamic programming-based frequency allocation scheme, and real-time task scheduling strategies. Experimental results demonstrate that, compared to the existing fault-tolerant methods, FTTGTM handles multiple permanent faults in cores, links, and routers more effectively, achieving an average 67.7% energy consumption reduction, while ensuring reliable scheduling with low communication overhead.